DocumentCode
2906435
Title
Implicit Critical PDF Test Generation with Maximal Test Efficiency
Author
Christou, Kyriakos ; Michael, Maria K. ; Tragoudas, Spyros
Author_Institution
Dept. of Electr. & Comput. Eng., Cyprus Univ.
fYear
2006
fDate
Oct. 2006
Firstpage
50
Lastpage
58
Abstract
A new framework for generating test sets with high test efficiency (TE) for critical path delay faults (PDFs) is presented. TE is defined as the number of new critical PDFs detected by a generated test. The proposed method accepts as input a set of potentially critical PDFs and generates a compact test set for only the critical PDFs (i.e., non-sensitizable PDFs are effectively dropped from consideration), whilst avoiding any path or segment enumeration. This is done by exploiting the properties of the ISOPs/ZBDD data structure, which is shown to efficiently represent a set of critical paths along with all their associated sensitization test cubes. The experimental results demonstrate that the proposed method is scalable in terms of test efficiency and can generate very compact test sets for critical PDFs
Keywords
binary decision diagrams; delays; logic testing; ISOP data structure; ZBDD data structure; critical path delay faults; implicit critical PDF test generation; sensitization test cubes; test efficiency; Boolean functions; Circuit faults; Circuit testing; Compaction; Data structures; Delay; Robustness; Tellurium;
fLanguage
English
Publisher
ieee
Conference_Titel
Defect and Fault Tolerance in VLSI Systems, 2006. DFT '06. 21st IEEE International Symposium on
Conference_Location
Arlington, VA
ISSN
1550-5774
Print_ISBN
0-7695-2706-X
Type
conf
DOI
10.1109/DFT.2006.34
Filename
4030915
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