A zero-overhead dynamic optically reconfigurable gate array

This paper presents a zero-overhead dynamic optically reconfigurable gate array (DORGA) that uses the load capacitance of gates to construct a gate array to maintain its state during optical reconfiguration, and uses junction capacitance of photodiodes as configuration memory. It improves a reconfiguration overhead problem of the previously proposed DORGA. The reconfiguration procedure is executable without the overhead of optical reconfiguration by reducing the dispersion delay between optical reconfiguration circuits. This paper presents the design of 1,632 gate count zero-overhead DORGAs reduced the dispersion delay using a standard 0.35 μm three-metal CMOS process technology.