DocumentCode
2906698
Title
High performance channel model hardware emulator for 802.11n
Author
Dassatti, Alberto ; Masera, Guido ; Nicola, Mario ; Concil, Andrea ; Poloni, Angelo
Author_Institution
VLSI Lab., Politecnico di Torino, Italy
fYear
2005
fDate
11-14 Dec. 2005
Firstpage
303
Lastpage
304
Abstract
In this paper, the design and implementation of a new high performance hardware channel emulator is presented. The purpose of the developed emulator is to efficiently reproduce in a laboratory environment the accurate behaviour of several effects of the radio channel over a multiple antennas wireless communication system, including AWGN (additive white Gaussian noise), multipath, attenuation and Doppler shift. The main application target is the test and the performance evaluation of a new 802.11n transceiver. The prototype has been implemented on a board including both an ARM processor and a field programmable gate array (FPGA), and it supports the simulation of a 40 MHz radio frequency bandwidth.
Keywords
AWGN; Doppler shift; field programmable gate arrays; logic design; microprocessor chips; transceivers; wireless channels; 40 MHz; 802.11n transceiver; ARM processor; Doppler shift; additive white Gaussian noise; channel model hardware emulator; field programmable gate array; multiple antennas wireless communication system; radio channel; radio frequency bandwidth; AWGN; Additive white noise; Attenuation; Doppler shift; Field programmable gate arrays; Hardware; Testing; Transceivers; Virtual prototyping; Wireless communication;
fLanguage
English
Publisher
ieee
Conference_Titel
Field-Programmable Technology, 2005. Proceedings. 2005 IEEE International Conference on
Print_ISBN
0-7803-9407-0
Type
conf
DOI
10.1109/FPT.2005.1568572
Filename
1568572
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