DocumentCode :
2906863
Title :
A design methodology to generate dynamically self-reconfigurable SoCs for Virtex-II Pro FPGAs
Author :
Van den Branden, Gerd ; Touhafi, Abdellah ; Dirkx, Erik
Author_Institution :
Erasmushogeschool Brussel
fYear :
2005
fDate :
11-14 Dec. 2005
Firstpage :
325
Lastpage :
326
Abstract :
Today, the technology is available for the creation of dynamically self-reconfigurable systems. However, the lack of efficient methodologies for customizing the system to the requirements of the application withholds the widespread use of this promising technique. This paper fills the existing design productivity gap concerning dynamically self-reconfigurable systems on chip by proposing a consistent framework for the toolflow that will lead, in a very cost effective way, to an RT level implementation of this type of systems. As a proof of concept we discuss a case study where a virtual instrumentation machine for DSP applications is implemented on a Virtex-II Pro component and where the reconfiguration process is controlled by an embedded processor
Keywords :
field programmable gate arrays; logic design; reconfigurable architectures; system-on-chip; DSP applications; RT level implementation; Virtex-II Pro FPGA; dynamically self-reconfigurable SoC; field programmable gate array; system-on-chip; virtual instrumentation machine; Circuits; Costs; Design methodology; Digital signal processing chips; Field programmable gate arrays; Instruments; Phased arrays; Process control; Productivity; System-on-a-chip;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field-Programmable Technology, 2005. Proceedings. 2005 IEEE International Conference on
Conference_Location :
Singapore
Print_ISBN :
0-7803-9407-0
Type :
conf
DOI :
10.1109/FPT.2005.1568583
Filename :
1568583
Link To Document :
بازگشت