DocumentCode :
2906913
Title :
An overview of high-level synthesis of multiprocessors for logic programming
Author :
Fidjeland, Andreas ; Luk, Wayne
Author_Institution :
Imperial Coll. London
fYear :
2005
fDate :
11-14 Dec. 2005
Firstpage :
333
Lastpage :
334
Abstract :
This paper introduces a language and framework for designing multiprocessor architectures in the logic programming domain. Our goal is to enable application developers in areas such as machine learning and cognitive robotics to produce high-performance designs without detailed knowledge of hardware development. This framework provides a high level of abstraction, enabling rapid system generation and design space exploration while supporting high performance. We present an overview of the Archlog language and its library-based compilation framework, which makes use of a customisable logic programming processor. An example implementation of a multiprocessor for the machine learning system Progol on a 35MHz XC2V6000 FPGA achieves 43 times faster execution than a 2GHz Pentium 4 processor
Keywords :
field programmable gate arrays; high level synthesis; logic design; logic programming; microprocessor chips; multiprocessing systems; 2 GHz; 35 MHz; Archlog language; Pentium 4 processor; Progol; XC2V6000 FPGA; cognitive robotics; logic programming processor; machine learning system; multiprocessor architecture design; Cognitive robotics; Educational institutions; Field programmable gate arrays; Hardware; High level synthesis; Learning systems; Logic programming; Machine learning; Magnetic heads; Space exploration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field-Programmable Technology, 2005. Proceedings. 2005 IEEE International Conference on
Conference_Location :
Singapore
Print_ISBN :
0-7803-9407-0
Type :
conf
DOI :
10.1109/FPT.2005.1568587
Filename :
1568587
Link To Document :
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