Abstract :
A fully integrated, low-cost (area), low-power, high-gain, differential optical receiver analog front-end (AFE), including transimpedance amplifier (TIA), limiting amplifier (LA), DC-offset cancellation feedback and output-buffer is designed in TSMC 0.18μm CMOS technology. The optimized TIA has a regulated cascode (RGC) topology, with 5.9mW power-dissipation, 48 dBΩ gain, 8.46GHz bandwidth. The proposed limiting amplifier (LA) has an inductor-less topology, with 41.9dB gain, 91.1mW power consumption (including output buffer), output swing of 0.4Vp-p, and bandwidth of 7.88GHz (output-buffer applied), using built-in active inductors and negative Miller capacitance to broaden the bandwidth. The AFE has 89.94 dBΩ gain, 6.84GHz bandwidth, 0.4Vp-p output voltage swing to 50Ω transmission lines, 103.2mW power consumption with 1.8V supply voltage, and sensitivity of 14.5μA for BER of 10-12.
Keywords :
CMOS analogue integrated circuits; buffer circuits; circuit feedback; limiters; low-power electronics; operational amplifiers; optical receivers; 0.18 micron; 1.8 V; 10 Gbit/s; 103.2 mW; 14.5 muA; 41.9 dB; 5.9 mW; 50 ohm; 6.84 GHz; 7.88 GHz; 8.46 GHz; 91.1 mW; CMOS technology; DC-offset cancellation feedback; built-in active inductors; differential optical receiver analog front-end; inductor-less topology; limiting amplifier; negative Miller capacitance; regulated cascode topology; transimpedance amplifier; Bandwidth; CMOS technology; Differential amplifiers; Energy consumption; Optical amplifiers; Optical receivers; Output feedback; Semiconductor optical amplifiers; Topology; Voltage;
