Substrate-noise and random-fluctuations reduction with self-adjusted forward body bias

Author

Komatsu, Yoshihide ; Ishibashi, Koichiro ; Yamamoto, Masaharu ; Tsukada, Toshiro ; Shimazaki, Kenji ; Fukazawa, Mitsuya ; Nagata, Makoto

Author_Institution

Semicond. Technol. Acad. Res. Center, Yokohama, Japan

fYear

2005

fDate

18-21 Sept. 2005

Firstpage

35

Lastpage

38

Abstract

We propose a method of reducing substrate noise and random fluctuations utilizing a self-adjusted forward body bias (SA-FBB) circuit. To achieve this, we designed a test chip that contained an on-chip oscilloscope for detecting dynamic noise from various frequency noise sources, and another test chip that contained 10-M transistors for measuring random fluctuation tendencies. Under SA-FBB conditions, it reduced noise by 69.8% and reduced random fluctuations σ(I_ds) by 57.9%.

Keywords

integrated circuit design; integrated circuit noise; integrated circuit testing; 130 mm; 90 nm; dynamic noise detection; on-chip oscilloscope; random fluctuation reduction; self-adjusted forward body bias circuit; substrate noise reduction; test chip; Circuit noise; Circuit simulation; Circuit testing; Dynamic voltage scaling; Fluctuations; Frequency; Noise measurement; Noise reduction; Semiconductor device noise; Substrates;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 2005. Proceedings of the IEEE 2005

Print_ISBN

0-7803-9023-7

Type

conf

DOI

10.1109/CICC.2005.1568601

Filename

1568601