System-level design guidance using algorithm properties

This paper introduces an approach which provides quantitative information used to aid in making system-level design decisions such as algorithmic or architectural selection. The method is based on the idea of identifying and using the size and structural properties of algorithms, which affect design performance. These properties provide insight in the matching of an algorithm and a particular implementation platform and a link between algorithms and architectures. An in-depth study of three properties-concurrency, temporality, and regularity-is presented in the context of ASIC area estimation. The underlying intuition behind them and quantitative definitions are given. In addition, illustrations of their utility as estimators of implementation performance are shown using both examples and empirical studies