DocumentCode
2907950
Title
Fixed-point co-design in DSP
Author
Egolf, T.W. ; Famorzadeh, S. ; Madisetti, V.K.
Author_Institution
DSP Labs.-ECE, Georgia Tech., Atlanta, GA, USA
fYear
1994
fDate
1994
Firstpage
113
Lastpage
126
Abstract
Fixed-point implementation of DSP algorithms is attractive from the viewpoints of simplicity, cost-effectiveness and performance. Two problems confront the designer-(i) Lack of efficient compilers from high level languages to assembler for fixed-point DSPs, and (ii) Limited capabilities for automated systems design, rapid simulation, verification, and prototyping of fixed-point algorithms. This paper discusses recent efforts at the DSP Laboratory at Georgia Tech that address these problems within the VHDL library-based QuickFix environment
Keywords
digital signal processing chips; C-callable approach; DSP algorithms; DSP chips; Ptolemy; VHDL library-based QuickFix environment; automated systems design; compilers; fixed-point co-design; high level languages; prototyping; rapid simulation; verification; Algorithm design and analysis; Application specific integrated circuits; Assembly systems; Digital signal processing; Digital signal processing chips; Hardware; High level languages; Signal processing algorithms; Software prototyping; Virtual prototyping;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Signal Processing, VII, 1994., [Workshop on]
Conference_Location
La Jolla, CA
Print_ISBN
0-7803-2123-5
Type
conf
DOI
10.1109/VLSISP.1994.574736
Filename
574736
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