A 130 nm Implementation of Analog Variable Block-Size Motion Estimation Cell

Author

Marku, Joona ; Koskinen, Lauri ; Paasio, Ari

Author_Institution

Univ. of Turku, Turku

fYear

2007

fDate

26-28 Sept. 2007

Firstpage

57

Lastpage

60

Abstract

An evolved version of variable block-size analog motion estimation cell structure is presented. Due to the space restrictions of interconnects, used advanced variable block-size motion estimation architecture necessitates using deep-submicron design technology, which enables the dense spacing of interconnects. Therefore, a novel architecture realizing the cell structure in modern 130 nm technology and being more robust against analog inaccuracies than previous implementations, is designed and simulated.

Keywords

analogue integrated circuits; integrated circuit design; integrated circuit interconnections; low-power electronics; motion estimation; nanoelectronics; analog variable block-size analog motion estimation cell; deep-submicron design technology; interconnect spacing; size 130 nm; Convolution; Encoding; Energy consumption; High definition video; Integrated circuit interconnections; Laboratories; Motion estimation; Robustness; Sensor arrays; Space technology;

fLanguage

English

Publisher

ieee

Conference_Titel

Integrated Circuits, 2007. ISIC '07. International Symposium on

Conference_Location

Singapore

Print_ISBN

978-1-4244-0797-2

Electronic_ISBN

978-1-4244-0797-2

Type

conf

DOI

10.1109/ISICIR.2007.4441795

Filename

4441795