DocumentCode
2908338
Title
Division Unit for Binary Integer Decimals
Author
Lang, Tomás ; Nannarelli, Alberto
Author_Institution
Dept. of Electr. Eng. & Comput. Sci., Univ. of California, Irvine, CA, USA
fYear
2009
fDate
7-9 July 2009
Firstpage
1
Lastpage
7
Abstract
In this work, we present a radix-10 division unit that is based on the digit-recurrence algorithm and implements binary encodings (binary integer decimal or BID) for significands. Recent decimal division designs are all based on the binary coded decimal (BCD) encoding. We adapt the radix-10 digit-recurrence algorithm to BID representation and implement the division unit in standard cell technology. The implementation of the proposed BID division unit is compared to that of a BCD based unit implementing the same algorithm. The comparison shows that for normalized operands the BID unit has the same latency as the BCD unit and reduced area, but the normalization is more expensive when implemented in BID.
Keywords
adders; digital arithmetic; multiplying circuits; BID floating-point adder; BID floating-point multiplier; binary coded decimal encoding; binary integer decimals; decimal division designs; digit-recurrence algorithm; radix-10 digit-recurrence algorithm; radix-10 division unit; Arithmetic; Commercialization; Computer architecture; Computer science; Delay; Encoding; Hardware; Informatics; Silicon; USA Councils; computer arithmetic; decimal arithmetic; division;
fLanguage
English
Publisher
ieee
Conference_Titel
Application-specific Systems, Architectures and Processors, 2009. ASAP 2009. 20th IEEE International Conference on
Conference_Location
Boston, MA
ISSN
2160-0511
Print_ISBN
978-0-7695-3732-0
Electronic_ISBN
2160-0511
Type
conf
DOI
10.1109/ASAP.2009.42
Filename
5200003
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