• DocumentCode
    2908500
  • Title

    Scaling of analog-to-digital converters into ultra-deep-submicron CMOS

  • Author

    Chiu, Y. ; Nikoli, B. ; Gray, P.R.

  • Author_Institution
    Electr. & Comput. Eng., Illinois Univ., Urbana-Champaign, IL
  • fYear
    2005
  • fDate
    21-21 Sept. 2005
  • Firstpage
    375
  • Lastpage
    382
  • Abstract
    This paper presents the opportunities and challenges for scaling A/D converters into ultra-deep-submicron CMOS technologies. With faster transistors and better matching, the trend is to migrate into higher sample rates with lower resolutions. Limited dynamic range at low supply voltages remains the utmost challenge for high-resolution Nyquist converters, and oversampling will become the dominant technique in this arena in the future. Linearity correction with digital calibration is also becoming prevalent as the efficiency of calibration circuitry improves
  • Keywords
    CMOS integrated circuits; analogue-digital conversion; calibration; analog-to-digital converters; calibration circuitry; digital calibration; high resolution Nyquist converter; linearity correction; ultra-deep-submicron CMOS technology; Analog-digital conversion; CMOS technology; Calibration; Circuits; Dynamic range; Dynamic voltage scaling; Frequency; Linearity; Low voltage; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Custom Integrated Circuits Conference, 2005. Proceedings of the IEEE 2005
  • Conference_Location
    San Jose, CA
  • Print_ISBN
    0-7803-9023-7
  • Type

    conf

  • DOI
    10.1109/CICC.2005.1568684
  • Filename
    1568684