DocumentCode :
2908562
Title :
An Input Triggered Polymorphic ASIC for H.264 Decoding
Author :
Rao, Adarsha ; Alle, Mythri ; V, Sainath ; Shaik, Reyaz ; Chowhan, Rajashekhar ; Sankaraiah, S. ; Mantha, Sravanthi ; Nandy, S.K. ; Narayan, Ranjani
Author_Institution :
Indian Inst. of Sci., Bangalore, India
fYear :
2009
fDate :
7-9 July 2009
Firstpage :
106
Lastpage :
113
Abstract :
This paper reports the design of an input-triggered polymorphic ASIC for H.264 baseline decoder. Hardware polymorphism is achieved by selectively reusing hardware resources at system and module level. Complete design is done using ESL design tools following a methodology that maintains consistency in testing and verification throughout the design flow. The proposed design can support frame sizes from QCIF to 1080p.
Keywords :
application specific integrated circuits; decoding; electronic design automation; integrated circuit design; logic design; video coding; ESL design tool; H.264 decoding; design flow; hardware polymorphism; hardware resources; input-triggered polymorphic ASIC; Application specific integrated circuits; Costs; Decoding; Distributed control; Embedded computing; Engines; Field programmable gate arrays; Hardware; High definition video; Throughput; H.264 decoding; Polymorphic ASIC;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Application-specific Systems, Architectures and Processors, 2009. ASAP 2009. 20th IEEE International Conference on
Conference_Location :
Boston, MA
ISSN :
2160-0511
Print_ISBN :
978-0-7695-3732-0
Electronic_ISBN :
2160-0511
Type :
conf
DOI :
10.1109/ASAP.2009.7
Filename :
5200017
Link To Document :
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