A 40 Gb/s transversal filter in 0.18 /spl mu/m CMOS using distributed amplifiers

Author

Sewter, J. ; Carusone, Anthony Chan

Author_Institution

Edward S. Rogers Sr. Dept. of Electr. & Comput. Eng., Toronto Univ., Ont.

fYear

2005

fDate

21-21 Sept. 2005

Firstpage

417

Lastpage

420

Abstract

This paper describes a fully-differential 3-tap transversal filter in 0.18 mum CMOS capable of equalizing NRZ data up to 40 Gb/s. Each tap gain comprises a cascade of two distributed amplifiers with adjustable gain. Passive-LC delay lines in the distributed amplifiers also provide the 25 ps tap delays. The design is 1 mm times 1 mm (900 mum times 600 mum active area) and consumes up to 70 mW from a 1.8 V supply depending on the tap gains. It is the first reported CMOS transversal filter operating at 40 Gb/s

Keywords

CMOS integrated circuits; delay lines; distributed amplifiers; equalisers; high-speed integrated circuits; transversal filters; 0.18 micron; 1.8 V; 40 Gbit/s; CMOS transversal filter; NRZ data equalization; distributed amplifiers; fully-differential 3-tap transversal filter; passive-LC delay lines; tap delays; Bandwidth; Circuits; Delay lines; Distributed amplifiers; Equalizers; Finite impulse response filter; Optical fiber filters; Silicon germanium; Transmission lines; Transversal filters;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 2005. Proceedings of the IEEE 2005

Conference_Location

San Jose, CA

Print_ISBN

0-7803-9023-7

Type

conf

DOI

10.1109/CICC.2005.1568694

Filename

1568694