DocumentCode :
2908762
Title :
Programmable techniques for cell stability test and debug in embedded SRAMs
Author :
Pavlov, Andrei ; Sachdev, Manoj ; De Gyvez, José Pineda ; Azimane, Mohamed
Author_Institution :
Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont.
fYear :
2005
fDate :
21-21 Sept. 2005
Firstpage :
443
Lastpage :
446
Abstract :
Reliable cell stability test of modern embedded SRAMs calls for DFT techniques with a flexible detection threshold. We present two programmable cell stability test and debug techniques that use partially discharged floating bit lines to apply a weak overwrite stress to a cell under test. The applied stress can be digitally adjusted to track the process variations or the desired pass/fail threshold. The proposed techniques are demonstrated to exceed the regular data retention test in both the defect coverage and detection range
Keywords :
SRAM chips; circuit stability; design for testability; embedded systems; integrated circuit reliability; integrated circuit testing; programmable circuits; DFT techniques; cell stability debug; cell stability test; data retention test; embedded SRAM; flexible detection threshold; floating bit lines; programmable techniques; weak overwrite stress; Circuit stability; Circuit testing; Degradation; Delay; Embedded computing; Guidelines; Random access memory; Reliability engineering; Stress; Threshold voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference, 2005. Proceedings of the IEEE 2005
Conference_Location :
San Jose, CA
Print_ISBN :
0-7803-9023-7
Type :
conf
DOI :
10.1109/CICC.2005.1568701
Filename :
1568701
Link To Document :
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