Substrate noise immune design of an LC-tank VCO using sensitivity functions

Substrate noise is a major concern for the realization of radios on a mixed-signal chip. This paper presents a method for substrate noise immune VCO design. A sensitivity analysis is proposed to investigate and reduce the impact of substrate noise on a 900 MHz LC-tank VCO. The proposed method provides a designer with the necessary insight to control the performance degradation by substrate noise. Impact via the on-chip current reference is explained and solved reducing the overall impact with 10 dB. The VCO on-chip ground is recognized as a major entry point for substrate noise. Guarding is used to attenuate coupling of substrate noise into the VCO ground up to - 90 dB in this 0.18 μm design on a lightly doped substrate. In this way a high immunity for substrate noise is achieved.