• DocumentCode
    2909659
  • Title

    On-line dependability enhancement of multiprocessor SoCs by resource management

  • Author

    Braak, T. D Ter ; Burgess, S.T. ; Hurskainen, H. ; Kerkhoff, H.G. ; Vermeulen, B. ; Zhang, X.

  • Author_Institution
    CTIT, Univ. of Twente, Enschede, Netherlands
  • fYear
    2010
  • fDate
    29-30 Sept. 2010
  • Firstpage
    103
  • Lastpage
    110
  • Abstract
    This paper describes a new approach towards dependable design of homogeneous multi-processor SoCs in an example satellite-navigation application. First, the NoC dependability is functionally verified via embedded software. Then the Xentium processor tiles are periodically verified via on-line structural self-testing techniques, by using a new IIP Dependability Manager. Based on the Dependability Manager results, faulty tiles are electronically excluded and replaced by fault-free spare tiles via on-line resource management. This integrated approach enables fast electronic fault detection/diagnosis and repair, and hence a high system availability. The dependability application runs in parallel with the actual application, resulting in a very dependable system. All parts have been verified by simulation.
  • Keywords
    network-on-chip; system-on-chip; IIP dependability manager; NoC; Xentium processor; electronic diagnosis; electronic fault detection; embedded software; fault-free spare tiles; multiprocessor SoC; network-on-chip; on-line dependability enhancement; on-line resource management; on-line structural self-testing techniques; satellite-navigation; system-on-chip; Global Navigation Satellite Systems; IP networks; Resource management; Satellites; System-on-a-chip; Testing; Tiles;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    System on Chip (SoC), 2010 International Symposium on
  • Conference_Location
    Tampere
  • Print_ISBN
    978-1-4244-8279-5
  • Type

    conf

  • DOI
    10.1109/ISSOC.2010.5625564
  • Filename
    5625564