High Speed Ultra Wide Band Comparator in Deep Sub-Micron CMOS

Author

Mohan, A. ; Zayegh, A. ; Stojcevski, A. ; Veljanovski, R.

Author_Institution

Victoria Univ., Melbourne

fYear

2007

fDate

26-28 Sept. 2007

Firstpage

386

Lastpage

389

Abstract

This paper presents the implementation of a high speed low power over sampled CMOS comparator for use in a reconfigurable flash analog to digital converter (ADC) as part of a direct sequence - spread spectrum (DS-SS) based ultra wide band (UWB) radio receiver. The comparator was designed using a 90 nanometre (nm) CMOS technology process. The switching speed of the comparator is 4 giga-samples per second (GSps) for a 528 megahertz (MHz) input bandwidth. The comparator operates on a 1 V power supply. The total input referred offset of the comparator at 4 GSps is 33.1 mV which is about 0.6 LSB for a 4 bit flash converter.

Keywords

CMOS integrated circuits; analogue-digital conversion; comparators (circuits); radio receivers; spread spectrum communication; ultra wideband communication; DSSS; UWB; analog to digital converter; bandwidth 528 MHz; deep sub-micron CMOS; direct sequence spread spectrum; high speed ultra wide band comparator; radio receiver; size 90 nm; voltage 1 V; voltage 33.1 mV; Analog-digital conversion; Band pass filters; Bandwidth; CMOS technology; Channel capacity; Energy consumption; Frequency; Topology; Ultra wideband communication; Ultra wideband technology;

fLanguage

English

Publisher

ieee

Conference_Titel

Integrated Circuits, 2007. ISIC '07. International Symposium on

Conference_Location

Singapore

Print_ISBN

978-1-4244-0797-2

Electronic_ISBN

978-1-4244-0797-2

Type

conf

DOI

10.1109/ISICIR.2007.4441879

Filename

4441879