Performance analysis of finite-buffered multistage interconnection networks

A novel model for the performance evaluation of finite-buffered multistage interconnection networks (MINs) is proposed. In contrast to previous models, which are either rather inaccurate when input load is high or only applicable to some special cases (e.g., infinite buffers, single buffers, or low input load), the proposed model is very accurate for all ranges of input load and allows switching elements and buffer modules to be of any arbitrary sizes. By carefully redefining the states, the authors take into account the dependency between packets in consecutive clock cycles and states of buffers in adjacent stages so that the analysis can be more accurately performed