Design of a CMOS floating-gate resistor for highly linear amplifier and multiplier applications

Author

Özalevli, Erhan ; Hasler, Paul

Author_Institution

Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA

fYear

2005

fDate

21-21 Sept. 2005

Firstpage

735

Lastpage

738

Abstract

We present implementations of highly linear amplifier and multiplier circuits that employ a linear CMOS resistor. This tunable resistor is built by utilizing the common-mode linearization technique, and by exploiting the gate-coupling and charge-storage characteristics of the floating-gate transistors. It exhibits 0.01% THD for 1V_pp input. Also, the amplifier has an input linear range of 2.5V_pp for differential and single-ended inputs, and achieves 0.018% THD for 1V_pp differential input

Keywords

CMOS analogue integrated circuits; analogue integrated circuits; analogue multipliers; differential amplifiers; resistors; 1 V; 2.5 V; CMOS floating-gate resistor design; charge-storage characteristic; common-mode linearization; differential input; gate-coupling; highly linear amplifier; multiplier applications; single-ended input; Application software; Differential amplifiers; Feedback; Linearity; Linearization techniques; MOSFETs; Resistors; Transconductance; Tunable circuits and devices; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 2005. Proceedings of the IEEE 2005

Conference_Location

San Jose, CA

Print_ISBN

0-7803-9023-7

Type

conf

DOI

10.1109/CICC.2005.1568773

Filename

1568773