Title :
Direct cover MVL minimization with cost-tables
Author :
Dueck, Gerhard W.
Author_Institution :
Dept. of Electr. & Comput. Eng., US Naval Postgraduate Sch., Monterey, CA, USA
Abstract :
A direct cover algorithm for minimizing multivalued logic functions is described. The use of cost tables facilitates cost efficient implementations. Current-mode CMOS circuits are considered as target implementations. However, the algorithm can be readily adapted to different technologies by making appropriate changes in the cost tables. Previous direct cover methods selected the most isolated minterm to be covered first. Empirical results show that it is advantageous to start with the most clustered minterm. The number of implicants which have to be considered to cover a selected minterm increases greatly when universal literals are used (as opposed to window literals). Therefore, it is essential to limit the entries in the cost tables. A novel link field, associated with each cost table entry, reduces the number of implicants considered to cover a selected minterm. Two metrics are used when choosing an implicant: cost efficiency and function complexity
Keywords :
CMOS integrated circuits; computational complexity; many-valued logics; minimisation of switching nets; clustered minterm; cost efficiency; cost tables; cost-tables; current mode CMOS circuits; direct cover multivalued logic minimisation; function complexity; link field; logic functions; metrics; Bridges; CMOS technology; Clustering algorithms; Cost function; Councils; Isolation technology; Logic functions; Minimization; Programmable logic arrays;
Conference_Titel :
Multiple-Valued Logic, 1992. Proceedings., Twenty-Second International Symposium on
Conference_Location :
Sendai
Print_ISBN :
0-8186-2680-1
DOI :
10.1109/ISMVL.1992.186778
