Title :
The Design and Verification of FPGA CAD Toolset
Author :
Zhou, Huabing ; Ni, Minghao ; Chen, Stanley ; Liu, Zhongli
Author_Institution :
Chinese Acad. of Sci., Beijing
Abstract :
This paper introduces a complete CAD toolset for the implementation of digital logic in a field-programmable gate array (FPGA) platform. Compared with existing academic toolsets, this toolset introduces formal verification in each step of the tool flow, especially the formal verification of the configuration bitstream. The FPGA CAD tool verification flow using Formality is presented in detail. Using plug-in technology, we have developed an integrated FPGA design kit to incorporate all tools together.
Keywords :
field programmable gate arrays; formal verification; logic CAD; FPGA CAD toolset; field-programmable gate array; formal verification; plug-in technology; Application specific integrated circuits; Design automation; Field programmable gate arrays; Formal verification; Logic arrays; Logic design; Operating systems; Routing; Switches; Wires;
Conference_Titel :
Integrated Circuits, 2007. ISIC '07. International Symposium on
Conference_Location :
Singapore
Print_ISBN :
978-1-4244-0797-2
Electronic_ISBN :
978-1-4244-0797-2
DOI :
10.1109/ISICIR.2007.4441898
