DocumentCode
2910038
Title
Packing LUT Clusters with Network Flow Programming
Author
Zhou, Huabing ; Ni, Minghao ; Chen, Stanley ; Liu, Zhongli
Author_Institution
Chinese Acad. of Sci., Beijing
fYear
2007
fDate
26-28 Sept. 2007
Firstpage
469
Lastpage
472
Abstract
This paper describes a two-step packing algorithm for LUT clusters of which the LUT input multipliers are depopulated. In the first step, a greedy algorithm is used to search for BLE locations and cluster inputs. If the greedy algorithm fails, the second step with network flow programming algorithm is employed. Numerical results illustrate that our two-step packing algorithm obtains better packing density than one-step greedy packing algorithm.
Keywords
logic design; multiplying circuits; table lookup; greedy algorithm; input multipliers; network flow programming algorithm; packing LUT clusters; packing algorithm; Clustering algorithms; Degradation; Delay; Field programmable gate arrays; Greedy algorithms; Logic design; Routing; Runtime; Switches; Table lookup;
fLanguage
English
Publisher
ieee
Conference_Titel
Integrated Circuits, 2007. ISIC '07. International Symposium on
Conference_Location
Singapore
Print_ISBN
978-1-4244-0797-2
Electronic_ISBN
978-1-4244-0797-2
Type
conf
DOI
10.1109/ISICIR.2007.4441900
Filename
4441900
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