Dynamic current-mode multi-valued MOS memory with error correction

Author

Lee, Edward K F ; Gulak, P. Glenn

Author_Institution

Dept. of Electr. Eng., Toronto Univ., Ont., Canada

fYear

1992

fDate

27-29 May 1992

Firstpage

208

Lastpage

215

Abstract

The design of a dynamic current-mode multivalued MOS memory, with error correction used to increase the noise margins, is presented. It is based on the current-copier and single-slope analog-to-digital conversion techniques. The noise margin of the multivalued stored data is increased by storing and comparing the least significant bits of its binary representation during each refresh cycle. Alternatively, the number of bits of precision can be increased for a given noise margin. Furthermore, this technique provides a design trade-off between noise margin and implementation area

Keywords

MOS integrated circuits; analogue-digital conversion; emitter-coupled logic; error correction; integrated logic circuits; integrated memory circuits; many-valued logics; binary representation; current-copier; design trade-off; dynamic current mode multivalued MOS memory; error correction; noise; refresh cycle; single-slope analog-to-digital conversion; Circuit noise; Error correction; Multivalued logic; Noise level; Noise reduction; Power supplies; Quantization; Random access memory; Switches; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Multiple-Valued Logic, 1992. Proceedings., Twenty-Second International Symposium on

Conference_Location

Sendai

Print_ISBN

0-8186-2680-1

Type

conf

DOI

10.1109/ISMVL.1992.186797

Filename

186797