• DocumentCode
    2910570
  • Title

    Improvement of fault injection techniques based on VHDL code modification

  • Author

    Baraza, J.C. ; Gracia, J. ; Gil, D. ; Gil, P.J.

  • Author_Institution
    Dept. of Comput. Eng., Valencia Tech. Univ., Spain
  • fYear
    2005
  • fDate
    30 Nov.-2 Dec. 2005
  • Firstpage
    19
  • Lastpage
    26
  • Abstract
    Fault injection techniques based on the use of VHDL as design language offer important advantages with regard to other fault injection techniques. First, as they can be applied during the design phase of the system, they allow reducing the time-to-market. Second, this type of techniques presents high controllability and reachability. Among the different techniques, those based on the use of saboteurs and mutants are especially attractive due to their high capability of fault modeling. However, it is difficult to implement automatically these techniques in a fault injection tool, mainly the insertion of saboteurs and the generation of mutants. In this paper, we present new models of saboteurs and mutants that can be easily applicable in VFIT, a fault injection tool developed by the Fault-Tolerant Systems Research Group (GSTF) of the Technical University of Valencia.
  • Keywords
    circuit simulation; fault simulation; hardware description languages; VHDL code modification; fault injection; fault modeling; mutant generation; saboteur insertion; time-to-market reduction; Controllability; Costs; Design engineering; Fault diagnosis; Fault tolerant systems; Gas insulated transmission lines; Hardware; Observability; Process design; Time to market;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    High-Level Design Validation and Test Workshop, 2005. Tenth IEEE International
  • ISSN
    1552-6674
  • Print_ISBN
    0-7803-9571-9
  • Type

    conf

  • DOI
    10.1109/HLDVT.2005.1568808
  • Filename
    1568808