• DocumentCode
    2910585
  • Title

    Design of a multiple-valued VLSI processor for digital control

  • Author

    Shimabukuro, Katsuhiko ; Kameyama, Michitaka ; Higuchi, Tatsuo

  • Author_Institution
    Tohoku Univ., Sendai, Japan
  • fYear
    1992
  • fDate
    27-29 May 1992
  • Firstpage
    322
  • Lastpage
    329
  • Abstract
    A high-performance parallel, multivalued VLSI processor using the radix-2 signed-digit number system is proposed. Multivalued bidirectional current-mode technology is used not only in the high-speed small-sized arithmetic circuits, but also in reducing the number of connections. Compactness and high-speed operation enhance the performance of the processor chip under the chip size limitation. The processor has been developed for real-time digital control, where the performance is evaluated by delay time. A performance estimation using SPICE simulators shows that the delay time of the processor for operations such as matrix multiplication is greatly reduced in comparison to a conventional binary processor
  • Keywords
    VLSI; circuit analysis computing; digital arithmetic; emitter-coupled logic; many-valued logics; microprocessor chips; SPICE simulators; bidirectional current-mode technology; chip size limitation; compactness; conventional binary processor; delay time; digital control; high-speed operation; matrix multiplication; multiple-valued VLSI processor; performance estimation; radix-2 signed-digit number system; Arithmetic; Circuits; Delay effects; Delay estimation; Digital control; Intelligent robots; Parallel processing; Robot control; Robot sensing systems; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Multiple-Valued Logic, 1992. Proceedings., Twenty-Second International Symposium on
  • Conference_Location
    Sendai
  • Print_ISBN
    0-8186-2680-1
  • Type

    conf

  • DOI
    10.1109/ISMVL.1992.186813
  • Filename
    186813