Bridged shuffle-exchange network: A high performance self-routing ATM switch

A high-performance self-routing switch architecture, based on a multistage interconnection network, is proposed for asynchronous transfer mode (ATM) switching systems. It makes use of the principle of error-prevention routing. The switch performance is studied under uniform traffic and full load conditions. The switch is shown to achieve high throughput and low cell loss probability using a smaller number of stages when compared to previously reported results. The number of stages needed to achieve a certain cell loss probability is also shown to be linear with logN