DocumentCode :
2911389
Title :
An improved power constrained simultaneous noise and input matched 2.45 GHz CMOS NB-LNA
Author :
Eshghabadi, H.A. ; Eshghabadi, Farshad ; Mustaffa, Mohd Tafir ; Noh, Norlaili Mohd ; Manaf, Asrulnizam Abd ; Sidek, Othman
fYear :
2012
fDate :
3-4 Oct. 2012
Firstpage :
92
Lastpage :
97
Abstract :
This paper presents a fully integrated two-stage narrow-band low noise amplifier which optimized to work in 2.45 GHz center frequency. The topology of inductive source degenerated cascode based on power-constrained simultaneous noise and input matching (PCSNIM) technique has been adopted to make the LNA suitable for low power applications based on 0.13 μm Silterra CMOS technology. Post layout simulation results show power gain of 22 dB, NF of 2.06 dB, S11 of -19 dB and S22 of -12 dB while consuming the DC current of 4 mA at supply voltage of 1.2 V.
Keywords :
CMOS integrated circuits; UHF amplifiers; UHF integrated circuits; low noise amplifiers; low-power electronics; CMOS NB-LNA; PCSNIM; current 4 mA; frequency 2.45 GHz; gain 22 dB; inductive source degenerated cascode; narrow-band low noise amplifier; noise figure 2.06 dB; post layout simulation; power constrained simultaneous noise and input matching; size 0.13 mum; voltage 1.2 V; CMOS integrated circuits; CMOS technology; Gain; Impedance matching; Inductors; Noise; Topology; CMOS; Inductive source degenerated cascode; Low Noise Amplifier; Narrow-band; PCSNIM technique;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (ICCAS), 2012 IEEE International Conference on
Conference_Location :
Kuala Lumpur
Print_ISBN :
978-1-4673-3117-3
Electronic_ISBN :
978-1-4673-3118-0
Type :
conf
DOI :
10.1109/ICCircuitsAndSystems.2012.6408341
Filename :
6408341
Link To Document :
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