A programmable VLC core architecture for video compression DSP

A programmable Variable-Length Coder/decoder, “VLC core”, is developed for various video compression algorithms and standards. This paper describes the programmable architecture that allows the coding and the decoding process to be performed by the same logical units on a small chip. This VLC core is the first coder and decoder which shares the table memory, the barrel shifter and the code buffer for coding and decoding with sufficient programmability for MPEG 1, 2 and H.261