DocumentCode
2912158
Title
How to specify an algorithm in VLSI architectural synthesis? A vocal coding application
Author
Diguet, J. Ph ; Sentieys, O. ; Martin, E. ; Philippe, J.L.
Author_Institution
LASTI-ENSSAT, Lannion, France
fYear
1994
fDate
1994
Firstpage
346
Lastpage
355
Abstract
A high level synthesis tool automatically designs an architectural solution for an application based on its behavioral description. The design optimization depends on the constraints (time, cost, …), on the operators specified in a component library as well as on the specification style. The architectural synthesis exploits the intrinsic parallelism of the algorithm and the re-use of hardware operators. Architectural and Logic synthesis tools are complementary in order to complete a silicon integration. In this paper, we present the results obtained with GAUT for the implementation of a communication algorithm (MICDA). This example underlines the adequacy between the algorithmic specification and the synthesized architecture
Keywords
VLSI; GAUT; MICDA; VLSI architectural synthesis; communication algorithm; design optimization; high level synthesis; logic synthesis; parallelism; silicon integration; vocal coding; Cost function; Design optimization; Hardware; High level synthesis; Libraries; Logic; Signal processing algorithms; Signal synthesis; Time factors; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Signal Processing, VII, 1994., [Workshop on]
Conference_Location
La Jolla, CA
Print_ISBN
0-7803-2123-5
Type
conf
DOI
10.1109/VLSISP.1994.574759
Filename
574759
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