Title :
The system implementation of I-phone hardware by using low bit rate speech coding
Author :
Chen, Ruei-Xi ; Chen, Mei-Juan ; Chen, Liang-Gee ; Tsai, Tsung-Han
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Abstract :
This paper presents a system implementation for Internet-phone communication with real-time speech coding schemes. A low-cost speech processing coprocessor is embedded. A CPLD device is used to implement the interface between the host processor and the coprocessor via conventional parallel port. At the headphone interface, there are a 16-bits PCM CODEC and an audio amplifier with acoustic echo cancellation features employed. The system consists of a mixed implementation of software and hardware. The experimental coding rate is 8.5 kbps. In such rate, a 14.4 kbps or higher speed modem can conform to offer full-duplex speech for the applications such as digital simultaneous voice data (DSVD)
Keywords :
Internet; coprocessors; digital signal processing chips; echo suppression; speech codecs; speech coding; 16-bits PCM CODEC; CPLD device; I-phone hardware; Internet-phone communication; acoustic echo cancellation features; audio amplifier; coding rate; digital simultaneous voice data; full-duplex speech; low bit rate speech coding; modem; real-time speech coding schemes; speech processing coprocessor; system implementation; Bit rate; Codecs; Coprocessors; Hardware; Headphones; Internet; Phase change materials; Real time systems; Speech coding; Speech processing;
Conference_Titel :
Signal Processing Systems, 1997. SIPS 97 - Design and Implementation., 1997 IEEE Workshop on
Conference_Location :
Leicester
Print_ISBN :
0-7803-3806-5
DOI :
10.1109/SIPS.1997.626328
