DocumentCode :
2913221
Title :
A complex arithmetic digital signal processor using CORDIC rotators
Author :
Freeman, S. ; O´Donnell, M.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA
Volume :
5
fYear :
1995
fDate :
9-12 May 1995
Firstpage :
3191
Abstract :
A versatile signal processor has been designed that can perform multiple rotations, multiplications and additions within one clock cycle. The computational elements of this processor include four pipelined CORDIC rotators, two pipelined fast multipliers and two adders. A combination of register files, SRAM, and ROM provides on chip storage for coefficients, running sums and programs. The chip architecture and its applicability to complex valued signal processing tasks are discussed
Keywords :
CMOS digital integrated circuits; digital signal processing chips; parallel algorithms; parallel architectures; pipeline arithmetic; 0.8 micron; CORDIC rotators; ROM; SRAM; additions; chip architecture; chip storage; complex arithmetic digital signal processor; computational elements; multiple rotations; multiplication; pipelined CORDIC rotators; pipelined fast multipliers; programs; register files; running sums; signal processing tasks; Adders; Clocks; Digital arithmetic; Digital signal processors; Process design; Random access memory; Read only memory; Registers; Signal design; Signal processing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Acoustics, Speech, and Signal Processing, 1995. ICASSP-95., 1995 International Conference on
Conference_Location :
Detroit, MI
ISSN :
1520-6149
Print_ISBN :
0-7803-2431-5
Type :
conf
DOI :
10.1109/ICASSP.1995.479563
Filename :
479563
Link To Document :
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