DocumentCode :
2913347
Title :
Low cost chip-on-dot flip chip technique for unbumped die
Author :
Wang, Z.P. ; Tan, Y.M. ; Schreiber, Christopher M. ; Feigenbaum, Haim ; Shi, Z.F. ; Wei, J.
Author_Institution :
Gintic Inst. of Manuf. Technol., Singapore
fYear :
2000
fDate :
2000
Firstpage :
297
Lastpage :
301
Abstract :
The chip-on-dot flip chip technique has been developed for assembling chips on bumped Gold DotTM flexible substrates which do not require either under-bump metallization (UBM) or bumping of the die. This paper presents the latest developments in this technology. 3D finite element contact analysis was conducted to study the pressure distribution in the contact area of each dot. The chip-on-dot assembly process was simulated with temperature-dependent material properties. It was found that the average contact pressure during the bonding process strongly depended upon the dot geometry. It was found that with the optimal dot shape, the distribution of contact pressure promoted diffusion bonding across the whole contact area and produced little damage to Al pads. An electrically functional prototype was constructed and assembled using the chip-on-dot technique. The test vehicles were subject to temperature cycling tests. The test conditions were from -55°C to +125°C with 15 minutes dwell at the extreme temperatures. The test results are presented in the paper. It is concluded that this technique is potentially a low-cost and lead-free process, which eliminates the requirement for UBM and wafer bumping and does not need underfilling after assembly
Keywords :
environmental factors; finite element analysis; flip-chip devices; integrated circuit interconnections; integrated circuit packaging; integrated circuit reliability; integrated circuit testing; microassembling; thermal stresses; -55 to 125 C; 15 min; 3D finite element contact analysis; Al; Al pad damage; Au; UBM; assembling; average contact pressure; bonding process; bumped Gold Dot flexible substrates; chip-on-dot assembly process; chip-on-dot flip chip technique; chip-on-dot technique; contact area; contact area pressure distribution; contact pressure distribution; die bumping; diffusion bonding; dot geometry; dwell time; electrically functional prototype; lead-free process; optimal dot shape; temperature cycling tests; temperature-dependent material properties; test conditions; test vehicles; unbumped die; under-bump metallization; underfilling; wafer bumping; Assembly; Contacts; Costs; Finite element methods; Flip chip; Gold; Material properties; Metallization; Temperature; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics Packaging Technology Conference, 2000. (EPTC 2000). Proceedings of 3rd
Print_ISBN :
0-7803-6644-1
Type :
conf
DOI :
10.1109/EPTC.2000.906390
Filename :
906390
Link To Document :
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