DocumentCode :
2913404
Title :
VLSI architecture of the generalized multi delay frequency-domain algorithm for acoustic echo cancellation
Author :
El Helwani, Amer ; Le Scan, Patrice
Author_Institution :
CNET, Meylan, France
Volume :
5
fYear :
1995
fDate :
9-12 May 1995
Firstpage :
3195
Abstract :
Within the context of acoustic echo cancellation, the convergence rate of the NLMS adaptive filtering algorithm is not sufficient when the input signal is strongly correlated (speech signal). The GMDFα algorithm allows a faster convergence rate and faster tracking of the variation in the echo path to be identified. In these applications the filter may have several thousand tap length at a sampling rate of 16 kHz. This fact leads to difficulties in real time implementation of the algorithm. The paper describes an optimized architecture of a specific circuit which is designed to perform the computational intensive task of the GMDFα algorithm in real time. It can be carried out for long impulse response filters
Keywords :
CMOS digital integrated circuits; FIR filters; VLSI; acoustic signal processing; adaptive filters; application specific integrated circuits; convergence of numerical methods; digital filters; echo suppression; frequency-domain analysis; tracking; 0.5 micron; 16 kHz; GMDFα algorithm; VLSI architecture; acoustic echo cancellation; convergence rate; echo path; filter; generalized multi-delay frequency-domain algorithm; long impulse response filters; real time implementation; sampling rate; tracking; Adaptive filters; Computer architecture; Convergence; Delay; Design optimization; Echo cancellers; Filtering algorithms; Sampling methods; Speech; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Acoustics, Speech, and Signal Processing, 1995. ICASSP-95., 1995 International Conference on
Conference_Location :
Detroit, MI
ISSN :
1520-6149
Print_ISBN :
0-7803-2431-5
Type :
conf
DOI :
10.1109/ICASSP.1995.479564
Filename :
479564
Link To Document :
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