2915133

Logic Design and Synthesis with IEEE Logic Symbols in the DEMET System

Lahti, Jukka ; Kivelä, Jorma

University of Oulu

1992

4-7 Jan 1992

326

327

Automatic logic units; Boolean functions; Circuit simulation; Circuit synthesis; Design automation; Design optimization; Logic circuits; Logic design; Logic functions; Modems;

English

ieee

VLSI Design, 1992. Proceedings., The Fifth International Conference on

1063-9667

0-8186-2465-5

conf

10.1109/ICVD.1992.658073

658073