DocumentCode
2915222
Title
Design of an ultra high-speed voltage comparator
Author
Jian-Feng Wang ; Ji-hai Duan
Author_Institution
Sch. of Inf. & Commun., Guilin Univ. of Electron. Technol., Guilin, China
Volume
2
fYear
2010
fDate
1-2 Aug. 2010
Firstpage
145
Lastpage
148
Abstract
A high speed voltage comparator which can be used in high-speed Flash ADC is designed after considering the speed, offset voltage and other factors.The structure of the preamplifier and compare-latch circuit are analyzed .The high speed voltage comparator which consists of a preamplifier, a decision stage and an output buffer is based on SMIC 0.18μm CMOS process with 1.8 V power supply. The simulations result show that the comparator proposed can distinguish 0.3 mV at 1 GHz with a power consumption of only 53.6 μ W.
Keywords
CMOS digital integrated circuits; analogue-digital conversion; comparators (circuits); flip-flops; preamplifiers; SMIC CMOS process; compare-latch circuit; frequency 1 GHz; high-speed flash ADC; offset voltage; output buffer; power 53.6 muW; power consumption; preamplifier; size 0.18 mum; ultra high-speed voltage comparator design; voltage 0.3 mV; voltage 1.8 V; CMOS integrated circuits; high-speed ADC; offsets voltage; positive feedback; preamplifier;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits,Communications and System (PACCS), 2010 Second Pacific-Asia Conference on
Conference_Location
Beijing
Print_ISBN
978-1-4244-7969-6
Type
conf
DOI
10.1109/PACCS.2010.5625938
Filename
5625938
Link To Document