Title :
An update on SIPHER (Scalable Implementation of Primitives for Homomorphic EncRyption) — FPGA implementation using Simulink
Author :
Cousins, D.B. ; Rohloff, Kathrin ; Peikert, Chris ; Schantz, Richard
Author_Institution :
Raytheon BBN Technol., Georgia Inst. of Technol., Atlanta, GA, USA
Abstract :
Accelerating the development of a practical Fully Homomorphic Encryption (FHE) scheme is the goal of the DARPA PROCEED program. For the past year, this program has had as its focus the acceleration of various aspects of the FHE concept toward practical implementation and use. FHE would be a game-changing technology to enable secure, general computation on encrypted data, e.g., on untrusted off-site hardware. However, FHE will still require several orders of magnitude improvement in computation before it will be practical for widespread use. Recent theoretical breakthroughs demonstrated the existence of FHE schemes [1, 2], and to date much progress has been made in both algorithmic and implementation improvements. Specifically our contribution to the Proceed program has been the development of FPGA based hardware primitives to accelerate the computation on encrypted data using FHE based on lattice techniques [3]. Our project, SIPHER, has been using a state of the art tool-chain developed by Mathworks to implement VHDL code for FPGA circuits directly from Simulink models. Our baseline Homomorphic Encryption prototypes are developed directly in Matlab using the fixed point toolbox to perform the required integer arithmetic. Constant improvements in algorithms require us to be able to quickly implement them in a high level language such as Matlab. We reported on our initial results at HPEC 2011 [4]. In the past year, increases in algorithm complexity have introduced several new design requirements for our FPGA implementation. This report presents new Simulink primitives that had to be developed to deal with these new requirements.
Keywords :
cryptography; field programmable gate arrays; hardware description languages; DARPA PROCEED program; FHE concept; FPGA based hardware primitives; FPGA implementation; Fully Homomorphic Encryption scheme; Mathworks; Matlab; SIPHER program; Simulink; VHDL code; Verilog hardware description language; design requirement; field programmable gate array; fixed point toolbox; scalable implementation of primitives for homomorphic encryption; Clocks; Encryption; Field programmable gate arrays; Hardware; Pipeline processing; Software packages;
Conference_Titel :
High Performance Extreme Computing (HPEC), 2012 IEEE Conference on
Conference_Location :
Waltham, MA
Print_ISBN :
978-1-4673-1577-7
DOI :
10.1109/HPEC.2012.6408672