Title :
Fault propagation and diagnosis of LUTs in an FPGA without fault free assumptions
Author :
Kumar, T. Nandha
Author_Institution :
Fac. of Eng., Univ. of Nottingham Malaysia Campus, Semenyih, Malaysia
Abstract :
This paper proposes a new technique for propagating and diagnosing the faulty LUTs in an FPGA. This technique uses flip-flops and multiplexers for the fault propagation rather than LUTs and therefore the fault free assumption of the LUTs is eliminated. Also this technique diagnosis location of the multiple faulty LUTs precisely thus avoiding any fault masking. This method has been tested on the commercial FPGA and the experimental results are provided.
Keywords :
fault diagnosis; field programmable gate arrays; flip-flops; multiplexing equipment; FPGA; LUT; fault diagnosis; fault free assumptions; fault masking; fault propagation; field-programmable gate array; flip-flops; multiplexers; Built-in self-test; Circuit faults; Circuit testing; Fault detection; Fault diagnosis; Field programmable gate arrays; Logic testing; Manufacturing; Multiplexing; Table lookup; FPGA testing and diagnosis; LUT fault propagation; multiple LUT faults;
Conference_Titel :
Electronic Devices, Systems and Applications (ICEDSA), 2010 Intl Conf on
Conference_Location :
Kuala Lumpur
Print_ISBN :
978-1-4244-6629-0
DOI :
10.1109/ICEDSA.2010.5503045
