Improvisation of Gabor Filter design using Verilog HDL

This paper presents the improvisation of Gabor Filter design using Verilog HDL. This paper details important enhancement made to the Digital Gabor filter to minimize the sizing problem and the coding style that synthesizable. The intention is to study, analyze, simplify and improvise the design synthesis efficiency and accuracy while maintaining the same functionality. The main characteristic of the proposed approach was to replace the parallel multiplication-accumulation unit (MAC) to a serial multiplication-accumulation unit where the convolution matrix takes place. This significant change helps to reduce the sizing problem without jeopardizing the functionality of the Digital Gabor Filter. The result provides area efficiency architecture for the effective design.