Title :
Circuit design of weighted order statistics filter based on neural network in CMOS process
Author :
Hoseini, Pourya ; Mashoufi, Behbood
Author_Institution :
Microelectron. Res. Lab., Urmia Univ., Urmia, Iran
Abstract :
In this paper a circuit of order statistics filter is proposed which is programmable as a result of weighting action. In this design a sign function circuit is offered based on the neural network structure. One of the main applications of the proposed filter is in the image processing and for this reason all examples and operations are assumed for images. The circuit has been designed in CMOS 0.35 μm process and good results have been achieved.
Keywords :
CMOS analogue integrated circuits; electronic engineering computing; neural nets; nonlinear filters; CMOS process; circuit design; image processing; neural network; size 0.35 mum; weighted order statistics filter; CMOS process; Circuit simulation; Circuit synthesis; Digital filters; Equations; Image processing; Neural networks; Statistics; Transconductance; Voltage; Image Processing; Neural Network; Sigmoid Function; Weighted Order Statistics Filter;
Conference_Titel :
Electronic Devices, Systems and Applications (ICEDSA), 2010 Intl Conf on
Conference_Location :
Kuala Lumpur
Print_ISBN :
978-1-4244-6629-0
DOI :
10.1109/ICEDSA.2010.5503078
