• DocumentCode
    2919066
  • Title

    Structured Construction of VLSI Circuits Using Adjacency Lists

  • Author

    Satyanarayana, M.V.V.

  • Author_Institution
    Andhra University
  • fYear
    1992
  • fDate
    4-7 Jan 1992
  • Firstpage
    374
  • Lastpage
    375
  • Keywords
    Clocks; Compaction; Computer science; Counting circuits; Fabrication; Systems engineering and theory; Tiles; Very large scale integration; Wires;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Design, 1992. Proceedings., The Fifth International Conference on
  • ISSN
    1063-9667
  • Print_ISBN
    0-8186-2465-5
  • Type

    conf

  • DOI
    10.1109/ICVD.1992.658093
  • Filename
    658093