PSCML: Pseudo-Static Current Mode Logic

We introduce a new logic style called Pseudo-Static Current Mode Logic (PSCML), which aims to alleviate the power consumption and delay overhead concerns that have thwarted the wide-spread acceptance of a previously proposed Dynamic Current Mode Logic (DyCML) style. Different from DyCML, the proposed new logic style may be viewed by its environment as static, hence any PSCML-based gate/module can be readily embedded into static CMOS designs to construct CMOS/PSCML hybrid circuits. Simulation results show that, at the cost of some area increase, PSCML is faster and consumes less power than DyCML for most applications.