DocumentCode :
2919388
Title :
Characterization of the parasitic bipolar amplification in SOI technologies submitted to transient irradiation
Author :
Ferlet-Cavrois, V. ; Marcandella, C. ; Giraud, G. ; Gasiot, G. ; Colladant, T. ; Musseau, O. ; Fenouille, C. ; du Port de Poncharra, J.
Author_Institution :
CEA/DAM/DIF, Bruyeres-le-Chatel, France
fYear :
2001
fDate :
10-14 Sept. 2001
Firstpage :
217
Lastpage :
222
Abstract :
The parasitic bipolar amplification of SOI devices is analyzed as a function of the technology integration, from 0.8 μm down to 0.1 μm. Experiments and simulations show that the bipolar gain does not increase with technology downscaling. The body tie efficiency, to reduce the bipolar amplification, is measured on both transistors and circuits. Implications on the dose rate hardness are deduced on registers with and without body ties, as a function of the SOI technology integration.
Keywords :
amplification; bipolar integrated circuits; bipolar transistors; integrated circuit modelling; radiation hardening (electronics); semiconductor device models; silicon-on-insulator; 0.8 to 0.1 micron; SOI technologies; Si-SiO2; bipolar gain; circuits; dose rate hardness; parasitic bipolar amplification; transient irradiation; transistors; Circuits; Electrons; Isolation technology; MOS devices; MOSFETs; Semiconductor films; Silicon; Space vector pulse width modulation; Testing; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Radiation and Its Effects on Components and Systems, 2001. 6th European Conference on
Print_ISBN :
0-7803-7313-8
Type :
conf
DOI :
10.1109/RADECS.2001.1159283
Filename :
1159283
Link To Document :
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