Piezoresistive effect in top-down fabricated silicon nanowires

We have designed and fabricated silicon test chips to investigate the piezoresistive properties of both crystalline and polycrystalline nanowires using a top-down approach, in order to comply with conventional fabrication techniques. The test chip consists of 5 silicon nanowires and a reference resistor, each with integrated contacts for electrical 4-point measurements. We show an increase in the piezoresistive effect of 633% compared to bulk silicon. Preliminary temperature measurements indicate a larger temperature dependence of silicon nanowires, compared to bulk silicon. An increase of up to 34% compared to bulk polysilicon is observed in polysilicon nanowires with decreasing dimensions.