DocumentCode :
2920476
Title :
Load Balance Scheduling Algorithm for CMP Architecture
Author :
Shi, Qingsong ; Chen, Tianzhou ; Hu, Wei ; Huang, Changbin
Author_Institution :
Coll. of Comput. Sci., Zhejiang Univ., Hangzhou
fYear :
2009
fDate :
20-22 Feb. 2009
Firstpage :
396
Lastpage :
400
Abstract :
Chip MultiProcessor (CMP) has been the main stream in microprocessor design. Shared on-chip L2 caches are widely used in processors with homogeneous CMP architecture. In the paper, we propose a scheduling algorithm for such processors and the shared L2 caches are taken into account in this algorithm. First, the processor cores on chip will be divided into different core groups. The scheduling domain is also constructed according to these core groups. And then the load vectors for load balance are defined. Then a scheduling algorithm is designed and implemented for load balance on CMP architecture. We have compared our algorithm with the CMP scheduling algorithm of Linux. The experimental results show that, when there are multi-threads in execution, the load balancing between processors is achieved by our algorithm, the total execution time is reduced by 3%, and the miss rate of L2 cache is reduced by 0.2% as well.
Keywords :
Linux; microprocessor chips; processor scheduling; resource allocation; CMP architecture; Linux; chip multiprocessor; load balance scheduling algorithm; microprocessor design; shared on-chip L2 caches; Algorithm design and analysis; Computer architecture; Computer science; Educational institutions; Linux; Load management; Process design; Processor scheduling; Scheduling algorithm; chip multiprocessor; load balance; scheduling algorithm;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Computer Technology, 2009 International Conference on
Conference_Location :
Macau
Print_ISBN :
978-0-7695-3559-3
Type :
conf
DOI :
10.1109/ICECT.2009.74
Filename :
4795992
Link To Document :
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