Title :
A 60-GHz quadrature PLL in 90nm CMOS
Author :
Plessas, F. ; Panagiotopoulos, V. ; Kalenteridis, V. ; Souliotis, G. ; Liakou, F. ; Koutsomitsos, S. ; Siskos, S. ; Birbas, A.
Author_Institution :
Analogies S.A., Patras, Greece
Abstract :
A 1.2 V 60 GHz 120 mW phase-locked loop employing a quadrature differential voltage-controlled oscillator, a programmable charge pump, and a frequency quadrupler is presented. Implemented in a 90 m CMOS process and operating at 60 GHz with a 1.2 V supply, the PLL achieves a phase noise of -91 dBc/Hz at a frequency offset of 1 MHz.
Keywords :
CMOS integrated circuits; charge pump circuits; field effect MIMIC; low-power electronics; phase locked loops; phase noise; voltage-controlled oscillators; CMOS process; frequency 60 GHz; frequency quadrupler; power 120 mW; programmable charge pump; quadrature PLL; quadrature differential voltage-controlled oscillator; size 90 nm; voltage 1.2 V; CMOS integrated circuits; Charge pumps; Couplings; Frequency conversion; Phase locked loops; Phase noise; Voltage-controlled oscillators;
Conference_Titel :
Electronics, Circuits and Systems (ICECS), 2011 18th IEEE International Conference on
Conference_Location :
Beirut
Print_ISBN :
978-1-4577-1845-8
Electronic_ISBN :
978-1-4577-1844-1
DOI :
10.1109/ICECS.2011.6122285
