Low power optimization of an IIR for tail cancellation in High Energy Physics applications

In this paper we propose an alternative IIR filter architecture for tail cancellation of a TPC detector in the ALICE experiment. The proposed filter architecture allows a reduction in the width of the data-path minimizing the circuit complexity and thus its power consumption. There is no additional signal processing penalty. The choice of the multiplier architecture in the IIR filter allows operation at a reduced supply voltage to 0.8 V, while maintaining fast operation, reducing the power consumption in the digital circuit to 45% of what would be obtained if the nominal supply voltage 1.2 V was used.