A1CSA: An energy-efficient fast adder architecture for cell-based VLSI design

Energy-efficient fast adders are needed in the design of battery-powered portable devices. Although many fast adder architectures exist, most of them require transistor-level optimizations that prevent their synthesis in a standard-cell flow. This paper presents two energy-efficient Add-One Carry-Select Adders (A1CSA and A1CSAH) suited for standard-cells synthesis. Synthesis results showed that the A1CSA is the smallest fast adder requiring, on average, 22.2% less area than the Carry-Select Adder. They also showed that the A1CSAH is, on average, 10.8% faster and 3.4% more energy-efficient than the Carry-Lookahead Adder, thus corresponding to the best choice for high speed and high efficiency addition.