Impact of CMOS Scaling on RF/MMIC Designs

Author

Chang, M. C Frank ; Huang, Daquan

Author_Institution

Univ. of California at Los Angeles, Los Angeles

fYear

2007

fDate

9-11 Dec. 2007

Firstpage

183

Lastpage

187

Abstract

Recent performance advancement in super-scaled CMOS technologies has opened new avenues for implementing RF/MMICs on cost-effective mainstream silicon substrate. This talk addresses critical issues involved in designing those high-frequency circuits under technology constraints of decreasing supply voltage and device gain, increasing device mismatch and metal & substrate losses. The talk will also discuss possible circuit level solutions in both topology and signaling, which may mitigate those constraints and deliver demanded performance and functions for future high frequency communication systems.

Keywords

CMOS integrated circuits; MMIC; radiofrequency integrated circuits; CMOS scaling; MMIC designs; RFIC designs; high frequency communication systems; silicon substrate; CMOS technology; Circuit topology; III-V semiconductor materials; Linearity; MMICs; Radio frequency; Radiofrequency integrated circuits; Signal design; Space technology; Substrates; CMOS Scaling; Circuit Topology; High-Q passives; MMIC; RFIC; Signaling;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio-Frequency Integration Technology, 2007. RFIT 007. IEEE International Workshop on

Conference_Location

Rasa Sentosa Resort

Print_ISBN

978-1-4244-1307-2

Electronic_ISBN

978-1-4244-1308-9

Type

conf

DOI

10.1109/RFIT.2007.4443946

Filename

4443946