Bipolar reliability optimization through surface compensation of the base profile

Author

Burnett, J.D. ; Lage, C. ; Hayden, J.D.

Author_Institution

Motorola Inc., Austin, TX, USA

fYear

1992

fDate

March 31 1992-April 2 1992

Firstpage

107

Lastpage

111

Abstract

Increased reliability of advanced bipolar devices was achieved by compensating the surface of the base doping profile with a shallow, low-dose arsenic implant. An order of magnitude increase in lifetime was obtained without a degradation in emitter coupled logic gate delay or f/sub T/, while a 100* improvement in lifetime was exhibited with approximately a 20% degradation in gate delay and f/sub T/. This technique is applicable to non-self-aligned as well as self-aligned bipolar devices.<>

Keywords

BiCMOS integrated circuits; bipolar transistors; circuit reliability; compensation; delays; doping profiles; emitter-coupled logic; reliability; BiCMOS technology; Si:As; advanced bipolar devices; base doping profile; bipolar transistor; current gain; cutoff frequency; emitter coupled logic gate delay; lifetime; nonself aligned devices; reliability optimization; ring oscillator; self-aligned bipolar devices; surface compensation; BiCMOS integrated circuits; Bipolar transistors; Degradation; Delay; Doping profiles; Implants; Ion implantation; Isolation technology; Laboratories; Research and development;

fLanguage

English

Publisher

ieee

Conference_Titel

Reliability Physics Symposium 1992. 30th Annual Proceedings., International

Conference_Location

San Diego, CA, USA

Print_ISBN

0-7803-0473-X

Type

conf

DOI

10.1109/RELPHY.1992.187632

Filename

187632